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Fred's help text follows:

EMUPROM
=======

Ver. 1.0 - 07oct1997 - (c) Fred Handel

	File Description:
	-----------------

	- EMUP.EXE      MS DOS downloader
	- EMUP2051.BIN  AT89C2051 firmware
	- EMUPROM.GIF   Schematic drawing
	- FILE_ID.DIZ   Short description
	- README.TXT    This file


	What is it?
	-----------

This is a EPROM emulator design for (up to) 64K chips (27(C)512).
Based on a AT89C2051 flash microcontroller, it downloads the EPROM
data via PC serial port at 28.8Kbaud in about 30 seconds. It provides
complete in-circuit bus isolation and reset of the target system
during download.

	Hardware setup
	--------------

The AT89C2051 must be programmed with the EMUP2051.BIN file.
The reset output B2 must be connected across the reset cap of the
target system (check polarity!). PC serial port connection should be
made with null modem cable. The emulator side needs only Rx, Tx and
GND.

	PC software setup
	-----------------

	Just copy the EMUP.EXE to a PATH reachable directory on your HD.
	Type EMUP for usage.


	Registering
	-----------

If you like this design and intend to use it, you should register.

Registered users will receive the source code in C - Franklin/Keil
C51 for the '2051 and Turbo/Borland C++ for the PC. Detailed
documentation on hardware and software is also included.

	To register, send a postal money order of US$ 20,00 to:

		Fred Handel
		Rua 11 de Agosto, 42 Ap.06
		91020-050 Porto Alegre - RS
		Brazil

	Send your e-mail address for reply and delivery.

	Questions? Comments? Ideas? mailto: cristina@orion.ufrgs.br

Subject: Re: 64K EPROM EMULATOR
Date: Tue, 12 May 1998 09:06:01 -0300
From: Cristina e Fred Handel cristina@orion.ufrgs.br
To: Don McKenzie don@dontronics.com

At 17:33 08/05/98 +1000, you wrote:
>Hi Peter, thanks, I have forwarded this message onto Fred for comment.
>I'll be interested in the response. It has been some time since I spoke
>to Fred.
>
>Cheers Don...
>
>Peter Savage wrote:
>>
>> Hi Don,
>> Just a short note to advise that the 64K EPROM Emulator package that I
>> pulled off your page (by Fred Handel) has a very major design flaw as it
>> stands.
>>
>> The circuit shows the CPU (89C2051) directly driving the DATA buss, which
>> is fine when data is being written into the 2 62256 RAM chips. The
problem
>> comes when the CPU has finished writing data to the RAM & the board is
>> turned into EMULATE mode.
>>
>> As the 89C2051 IS NOT tristate (by what I can see from the data sheet),
>> then the CPU Port 1 shall 'load' the data buss & as a result, only '00'
>> appears as data to the target CPU.
>>
>> Solution would seem to be adding another 74HC245 between the CPU & RAM.
>> Drive connections I still have to work out, but that way you dont get the
>> CPU loading the data buss.
>>
>> Not sure if the design is actually yours or someone elses, but thought I
>> would let you know anyway.
>>
>> Cheers Peter Savage
>>
>> Researching ...ARNOT(T), BISHOP, CHAPMAN, HOL(E)MAN, PHIPPS, PURCELL,
>> ROBSON, SAINSBURY, SA(U)NDERS, SAVAGE, YATES
>>
>> ...                     -------//-------
>>               Email:- 
>>        Web Page URL:- http://www.wcis.net.au/~quartz/
>>            Location:- Wanneroo, WA, 6065, Australia.
>> ...                     -------//-------

Hi Don,

Just FYI, I sent this to Peter:

>>Sure Peter, the port is not tri-state, but you can make it look like a
pull->up by writing all ones (0xFF) to the port if you dont't want it to do
>anything. That's what I do in this design. This maybe a problem if your
target >system does not allow the extra bus load.
>>
>>Best regards;
>>
>>Fred.
>>
/*+------------------------------------------+
  + Fred Handel & Cristina Pungartnik Handel +
  + e-mail: cristina@orion.ufrgs.br          +
  + Rua 11 de Agosto, 42 Ap.06               +
  + 91020-050 - Porto Alegre, RS - Brazil    +
  +------------------------------------------+*/